Since the invention of the integrated circuit, the semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area.
In an attempt to further increase circuit density, three-dimensional (3D) integrated circuits (ICs) have been investigated. In a typical formation process of a 3D IC, two dies are bonded together and electrical connections are formed between each die and contact pads on a substrate. For example, one attempt involved bonding two dies on top of each other. The stacked dies were then bonded to a carrier substrate and wire bonds electrically coupled the contact pads on each die to contact pads on the carrier substrate. This attempt, however, requires a carrier substrate larger than the dies for the wire bonding.
More recent attempts have focused on through-silicon vias (TSVs). Generally, a TSV is formed by etching a vertical via through a substrate and filling the via with a conductive material, such as copper. The backside of the substrate is thinned to expose the TSVs, and solder balls are placed directly on the TSVs to provide an electrical contact. Copper bumps are formed as electrical contacts on the circuit side of a substrate of another die, wherein the copper bumps are electrically coupled to the TSVs.
Generally, the copper bumps on the circuit side of the substrate are formed prior to thinning of the backside of the substrate. In order to conduct the backside thinning process to expose the TSVs, the circuit side is joined to a carrier substrate by an adhesive that also covers the copper bumps. After the thinning process and bonding the two semiconductor dies, the carrier substrate and the adhesive are removed. Due to the uneven surface topography created by the copper bumps, it is often difficult to remove all of the adhesive from the semiconductor die, thus leaving an adhesive residue at topographical changes on the circuit side of the die.
Additionally, processes of forming copper bumps on the circuit side of the semiconductor device require an under bump metallization (UBM). Generally, aluminum comprises the final metal layer of most integrated circuits; however, aluminum does not bond well with the copper bumps used to form the circuit side electrical contacts of a semiconductor die. UBM is an additional metal layer added to the die between the aluminum metal layer and the copper bumps. The UBM layer prevents diffusion between the bump and the integrated circuits of the die, while also providing a low resistance electrical connection that is strong and stable. UBM materials, such as an electroless nickel immersion gold, are expensive materials that significantly increase the cost and manufacturing requirements of semiconductor die production.
Accordingly, there is a need for a better method of producing stackable dies that reduces the amount of adhesive residue remaining on the die after formation while also reducing the need for UBM.